Specify
A mathematical specification (PyTorch or JAX) of what the model computes
Describe what your model computes and we'll search for the fast implementation on each chip and formally prove the winner computes exactly what you asked for.
A mathematical specification (PyTorch or JAX) of what the model computes
Architecture-aware candidates generated and ranked automatically.
The fastest kernel with a formal proof that it's correct
Every high-performance kernel is shaped by a given chip's instructions, memory system and execution model, which is why we treat the math as fixed and the implementation as a search problem, not a compiler problem, so that every target gets it own kernel without anyone having to write it.
We model access patterns, placement, caching and the cost of moving data through the chip.
We account for the way that different instructions, lanes, warp, cores and synchronization behaves on the chip.
We run hundreds of millions of tests on each new chip to ensure that our hardware model is accurate to the chip.
With traditional compiler passes, you improve a program while keeping its structure intact, while we can search for a new program that performs the same calculation more efficiently on a specific target.
We start with the mathematical operation the workload needs, expressed as a clear reference rather than a hand-tuned implementation.
We generate candidates across algebraic rewrites, fusion, tiling, loop order, memory placement and execution schedule.
We eliminate poor candidates early, rank the survivors against the target architecture and benchmark the most promising kernels.
We compare the optimized kernel with its specification, reject semantic errors and return concrete counterexamples when a proof fails.
A modern kernel can have billions of valid-looking implementations, but compiling and benchmarking every one would make optimization its own compute problem.
Our cost model discards candidates that can't win before they are ever built.
Agent and learned search suggests candidate kernels that a rule-based compiler would never try.
We only measure the most promising candidates on real hardware, calibrate to each chip.
Having a faster kernel only matters if it's still computing the right thing, which is why we compare every optimized kernel symbolically against its reference across every input it accepts, so that if it's wrong on any inputs, it'll never reach production.
We optimize the operations your model actually runs in production, using its real tensor shapes, precision and deployment hardware.
Forward and backward kernels specialized for your sequence lengths, head sizes, masking, and precision, including variants you invented.
Optimized matrix operations tuned to your exact shapes and data types, from training to deployment.
Fuse memory-bound operations and choose schedules that reduce traffic and synchronization overhead.
Give new architectures a path from readable reference code to hardware-specific implementation.
Every model runs on its kernels and if you tell us what you're training, we'll show you how much faster it can go on the hardware you have.