From reference math to target-speed kernels.
SF Tensor automatically explores hardware-specific implementations of your workload, finds the fastest viable candidates and verifies that optimized code still computes what you asked for.
Reference
Same calculation
Search + model
Rank candidates
Optimized kernel
Target specific
Search
Equivalent programs
Measure
Target hardware
Prove
Contract passed
Input
A mathematical specification, not a hardware-specific implementation.
Search
Architecture-aware candidates generated and ranked automatically.
Output
A measured kernel with correctness evidence attached.
The fastest kernel is specific to the chip. Your model shouldn’t have to be.
High-performance kernels are shaped by a target’s instructions, memory system and execution topology. A portable language can translate syntax, but it cannot make one kernel design optimal for every architecture.
Our Kernel Optimizer treats the calculation as the constant and the implementation as a search problem. That lets the system create a different kernel for each target without asking researchers to rewrite the model.
Memory hierarchy
Model access patterns, placement, cache behavior and the cost of moving data through the chip.
Execution topology
Account for instructions, lanes, warps, cores and synchronization on the actual target.
Measured hardware profile
Use automatic microbenchmarks to calibrate the parameters that matter for ranking candidates.
Search the implementations. Preserve the calculation.
Traditional compiler passes improve a program while keeping its structure mostly intact. We search for a new program that performs the same calculation efficiently on a specific target.
Specify the calculation
Start with the mathematical operation the workload needs, expressed as a clear reference rather than a hand-tuned implementation.
Explore equivalent programs
Generate candidates across algebraic rewrites, fusion, tiling, loop order, memory placement and execution schedule.
Prune, model and measure
Eliminate poor candidates early, rank the survivors against the target architecture and benchmark the most promising kernels.
Prove before production
Compare the optimized kernel with its specification, reject semantic errors and return concrete counterexamples when a proof fails.
Specification
attention(q, k, v)
64×64
128×64
128×128
64×128
Don’t benchmark billions of possibilities. Make the search intelligent.
A fully expanded search space for a modern kernel can contain billions of valid-looking programs. Compiling and benchmarking every one would turn optimization into its own compute problem.
Prune obvious losses
Estimate dynamic cost and discard candidates with untenable allocation, movement or execution costs.
Rank what remains
Model the target’s memory, cache and inter-core topology to focus measurement on promising designs.
Learn from the hardware
Use real measurements and automatically generated microbenchmarks to calibrate each target profile.
Optimization should end with a proof obligation.
Fast code is only useful if it is still the right code. Our proof system symbolically compares a generated kernel with its reference over the input space represented by the contract, rather than trusting a finite sample of tests.
Reference
Candidate
No counterexample exists
Algebraically equivalent
Optimize the operations that make your model yours.
The target is not a generic benchmark. It is the operator, shape, precision and hardware combination that runs inside the production workload.
Sequence workloads
Attention
Specialized forward and backward kernels for sequence length, head dimension, masking and precision.
Core model compute
Linear algebra
Matrix operations tuned around the shapes, data types and layouts that appear in the real model.
Bandwidth-sensitive
Normalization & reductions
Fuse memory-bound operations and choose schedules that reduce traffic and synchronization overhead.
Custom research
Novel operators
Give new architectures a path from readable reference code to hardware-specific implementation.
Bring us the kernel slowing your model down.
We’ll look at the workload, target hardware and performance constraint with you, then map the shortest path to a production-ready implementation.
Train the models only you can build. One stack for enterprise post-training and frontier pre-training.
All Systems Operational© 2026 San Francisco Tensor Company
